Student Job - Digital design and validation for Interface IP (m/f) Job Description We are developing the key leading edge high speed Physical Layer Interfaces as well as different Interface and memory IP subsystems for Intel products. We offer you to be part of a development team which ambitiously contribute to shaping and driving the future of the next mobile communication solutions. We are looking for a talented, open-minded student with a technical background in digital design, simulation and verification of advanced digital High Speed Interface circuits in deep-submicron CMOS technologies. Your responsibilities will include: - RTL design and simulation, support design approach, configuration - Logic synthesis and timing analysis- Technical documentation - Functional and Timing verification support- desired - Dfx, Power aware Pre-Si design and Post-Si bring-up support- desired Inside this Business Group The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.